Publication:
Diffraction-Based Alignment Sensor and Mark Design Optimization to Enable Fine Overlay Accuracy for 50um-Thick Si Wafer Bonded to Glass Wafer in Die-to-Wafer Bonding Applications
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| dc.contributor.author | Tamaddon, Amir-Hossein | |
| dc.contributor.author | Jadli, Imene | |
| dc.contributor.author | Suhard, Samuel | |
| dc.contributor.author | Jourdain, Anne | |
| dc.contributor.author | Hsu, Alex | |
| dc.contributor.author | Schaap, Charles | |
| dc.contributor.author | De Poortere, Etienne | |
| dc.contributor.author | Miller, Andy | |
| dc.contributor.author | Kennes, Koen | |
| dc.contributor.author | Ceulemans, Karl | |
| dc.contributor.author | Blanco, Victor | |
| dc.date.accessioned | 2026-06-04T09:02:47Z | |
| dc.date.available | 2026-06-04T09:02:47Z | |
| dc.date.createdwos | 2026-02-10 | |
| dc.date.issued | 2024 | |
| dc.description.abstract | In this paper, a collective die-to-wafer bonding integration scheme will be investigated. Minimizing the difference between backside and frontside fingerprints using the ASML scanner is the primary goal of this study. In order to expose the wafer backside of the thinned wafer, requirements include aligning to marks present on wafer frontside, along with applying accurate corrections. In addition, the large errors introduced by temporary bonding need to be addressed. A grating mark with and without segmentation measured with ASML SMASH sensor using far infra-red wavelength, is capable addressing the detectability of wafer frontside marks through 50-um Si, and it is shown that we can detect misalignment errors of 200 nm and more. | |
| dc.identifier.doi | 10.1109/eptc62800.2024.10909913 | |
| dc.identifier.isbn | 979-8-3315-2201-8 | |
| dc.identifier.uri | https://imec-publications.be/handle/20.500.12860/59552 | |
| dc.language.iso | eng | |
| dc.provenance.editstepuser | greet.vanhoof@imec.be | |
| dc.publisher | IEEE | |
| dc.source.beginpage | 487 | |
| dc.source.conference | IEEE 26th Electronics Packaging Technology Conference (EPTC) | |
| dc.source.conferencedate | 2024-12-03 | |
| dc.source.conferencelocation | Singapore | |
| dc.source.endpage | 489 | |
| dc.source.journal | 2024 IEEE 26TH ELECTRONICS PACKAGING TECHNOLOGY CONFERENCE, EPTC | |
| dc.source.numberofpages | 3 | |
| dc.title | Diffraction-Based Alignment Sensor and Mark Design Optimization to Enable Fine Overlay Accuracy for 50um-Thick Si Wafer Bonded to Glass Wafer in Die-to-Wafer Bonding Applications | |
| dc.type | Proceedings paper | |
| dspace.entity.type | Publication | |
| imec.internal.crawledAt | 2026-04-07 | |
| imec.internal.source | crawler | |
| imec.internal.wosCreatedAt | 2026-04-07 | |
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