Publication:

Wafer-Level LICCDM Device Testing

Date

2021
Proceedings Paper
https://doi.org/10.23919/eos/esd52038.2021.9574789
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cris.virtual.orcid0000-0002-0356-0973
cris.virtual.orcid0000-0002-3623-1842
cris.virtual.orcid0000-0002-8390-6785
cris.virtual.orcid0000-0002-6481-2951
cris.virtualsource.department5d1a73c2-f82f-43a0-9af2-32fb15f176bf
cris.virtualsource.department894d712a-328b-43e9-8331-871ceac6a4e6
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cris.virtualsource.departmente0386a23-f2bf-4f53-a36f-c1380bca0db7
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cris.virtualsource.orcide0386a23-f2bf-4f53-a36f-c1380bca0db7
dc.contributor.authorSimicic, Marko
dc.contributor.authorWu, Wei-Min
dc.contributor.authorClaes, Dieter
dc.contributor.authorTamura, Shinichi
dc.contributor.authorShimada, Yohei
dc.contributor.authorSawada, Masanori
dc.contributor.authorChen, Shih-Hung
dc.contributor.imecauthorSimicic, Marko
dc.contributor.imecauthorWu, Wei-Min
dc.contributor.imecauthorClaes, Dieter
dc.contributor.imecauthorChen, Shih-Hung
dc.contributor.orcidimecSimicic, Marko::0000-0002-3623-1842
dc.date.accessioned2022-06-28T14:01:15Z
dc.date.available2022-05-05T02:17:41Z
dc.date.available2022-05-16T07:58:45Z
dc.date.available2022-06-28T14:01:15Z
dc.date.embargo9999-12-31
dc.date.issued2021
dc.description.abstractWith the integrated circuit technology evolution towards 25D and 3D stacking, wafer-level and bare-die-level electrostatic discharge testing is becoming a necessity. In this work, we use our Low-Impedance Contact CDM tester to measure integrated circuit products and assess the possibilities and potential issues of CDM testing of wafers and bare dies.
dc.identifier.doi10.23919/eos/esd52038.2021.9574789
dc.identifier.eisbn978-1-58537-329-1
dc.identifier.isbn978-1-58537-330-7
dc.identifier.issn0739-5159
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/39751
dc.publisherIEEE
dc.source.conference43rd Annual EOS/ESD Symposium (EOS/ESD)
dc.source.conferencedate2021-NaN
dc.source.conferencelocationTucson
dc.source.journal43rd Annual EOS/ESD Symposium (EOS/ESD)
dc.source.numberofpages8
dc.subject.disciplineElectrical & electronic engineering
dc.title

Wafer-Level LICCDM Device Testing

dc.typeProceedings paper
dspace.entity.typePublication
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