Heterogenous integration of III-V materials on Silicon

Abstract

III-V semiconductors are central to numerous applications such as telecom, datacom, automotive radar, high speed RF, IR sensing and imaging1. The demand for some of the applications like short range datacom with co-packaged optics is expected to dramatically increase with the push for fast and energy efficient AI systems2. Properties such as direct band gap, extended absorption range beyond visible wavelength, and high carrier mobilities make III-V materials ideal candidates for high performance lasers, LEDs, RF devices, and imagers. The corresponding drivers and digital logic processing in these systems remain silicon-based due to the performance and cost benefits. Therefore, co-integration of III-V materials with Silicon has been a topic of interest for several decades. Heterogenous integration of III-V on silicon has been explored using methods such as micro-bumping, micro-transfer printing, direct epitaxial growth of III-V on Silicon and wafer reconstitution – each at a different technology readiness level3,4. This talk will provide a comparative analysis of these heterogenous integration strategies, highlighting their maturity levels and applicability across different applications.IMEC has a long standing history of integrating dissimilar components, including III-V materials on a die or a wafer5,6. Processes such as die singulation, die-to-wafer and wafer-to-wafer bonding, temporary bonding and de-bonding, dielectric gap fill, grinding and planarization techniques have been developed and refined based on application-specific requirements. We will present the current status of several critical heterogenous integration processes using examples from three applications – GaN on silicon micro-LED displays, short wave infrared InP-based imagers and InP-based O-band lasers. Finally, we will discuss the main challenges that remain and outline potential pathways for their mitigation.