EUV Mask Defect Inspection for the 3nm Technology Node

Abstract

The paradigm switch to a reflective mask design for EUV lithography has proven to be challenging. Within the Horizon2020 PIn3S program Zeiss and imec are collaborating to address some of these challenges. In this work, an EUV mask with a collection of programmed defects representative for the 3nm technology node was reviewed. Defect printability at wafer level was analyzed after exposure on the ASML NXE:3400B by SEM. Furthermore, the mask was analyzed on the Zeiss AIMS® EUV platform and by SEM. For P36 (1x) 1:1 L/S programmed extrusions we have demonstrated that AIMS® EUV can be used to predict ADI local defect widths as well as (μ)bridge printability. Moreover, from P36 to P32 the mask spec regarding allowed opaque L/S extrusion widths needs to be tighter considering an earlier onset of ADI (μ)bridge printability and a stronger than expected ADI defect width increase through pitch.