Wafer to Wafer Hybrid Bonding Pitch Scaling Challenges (Invited)

Abstract

The past years technology aspects of wafer-to-wafer hybrid bonding pitch scaling down to 200nm was documented extensively. This paper discusses specific yield improvement challenges and solutions related to sub-micron scaling, such as wafer-to-wafer bond alignment accuracy, global and local wafer topography control by CMP ensuring void free hybrid bonding, electro-chemical copper corrosion of hybrid pads connected to long metal lines, surface-diffusion-driven copper bulge-out mechanisms, dielectric breakdown and copper diffusion along the bonding interface.