Algorithm-Enabled Isolation of Intrinsic Characteristics and Random Telegraph Noise in High-Resolution <i>I_D - V_G </i> Data

Abstract

Conventional random telegraph noise (RTN) characterization methods rely on time-domain measurements at fixed gate voltages, which are time-consuming and primarily used in capturing the statistical distribution of defect-induced effects. In this work, we instead focus on extracting statistically meaningful device-level parameters from high-resolution ID−VG characteristics using a statistically robust baseline construction algorithm (BCA) to isolate intrinsic transistor behavior from RTN-induced fluctuations. The BCA sequentially detects discrete defect-induced transitions and iteratively reconstructs the intrinsic ID−VG profile, enabling accurate extraction of maximum transconductance ( gm,max ) and the average impact per defect on threshold voltage ( η ). Using 10 000 Monte Carlo-generated datasets with varying numbers of defects, we demonstrate that the BCA reliably recovers intrinsic gm,max with minimal bias and variance, while direct fitting of high-resolution ID−VG characteristics systematically underestimates transconductance. Furthermore, η is extracted directly from threshold voltage shift distributions across the gate voltage range, yielding estimates in excellent agreement with the MC simulator input value. The proposed methodology provides a comprehensive, efficient, and defect-centric approach for quantifying individual defect contributions to transistor variability, offering a practical framework for benchmarking advanced semiconductor technologies in the presence of defects.