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Browsing by Author "Casey, D."

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    Hybrid Channel monolithic-CFET with Si (110) pMOS and (100) nMOS

    Vandooren, Anne  
    ;
    Iacovo, Serena  
    ;
    Brissonneau, Vincent  
    ;
    Chiarella, Thomas  
    ;
    Cullen, C.
    ;
    Casey, D.
    Proceedings paper
    2025, IEEE International Electron Devices Meeting (IEDM), 2025-12-06
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    Junction-engineered Scaled High-performance GAA Nanosheet FETs with Ultra-low Temperature (< 350 °C) SiGe:B Source/Drain

    Sarkar, Ritam  
    ;
    Casey, D.
    ;
    Dutta, Arka  
    ;
    Eyben, Pierre  
    ;
    Pondini, Andrea  
    ;
    Mertens, Hans  
    Proceedings paper
    2025, EEE International Electron Devices Meeting (IEDM), 2025-12-06

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