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Browsing by Author "Caglar, Alican"

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    A 28nm 6.5-8.1GHz 1.16mW/qubit Cryo-CMOS System-on-Chip for Superconducting Qubit Readout

    Van Winckel, Steven
    ;
    Caglar, Alican
    ;
    Gys, Benjamin  
    ;
    Brebels, Steven  
    ;
    Potocnik, Anton  
    Proceedings paper
    2022, 48th IEEE European Solid State Circuits Conference (ESSCIRC), SEP 19-22, 2022, p.61-64
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    A 4.2mW 4K 6-8GHz CMOS LNA for Superconducting Qubit Readout

    Caglar, Alican  
    ;
    Van Winckel, Steven  
    ;
    Brebels, Steven  
    ;
    Wambacq, Piet  
    ;
    Craninckx, Jan  
    Proceedings paper
    2021, 17th IEEE Asian Solid-State Circuits Conference (A-SSCC) - Integrated Circuits and Systems for the Connection of Intelligent Things, NOV 07-10, 2021
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    A Scalable mK DC Demultiplexer With Extremely Low OFF-Leakage CMOS Switches for Biasing of Spin Qubits

    Caglar, Alican  
    ;
    Fattal, Imri  
    ;
    Godfrin, Clement  
    ;
    Li, Roy  
    ;
    Van Winckel, Steven  
    ;
    De Greve, Kristiaan  
    Journal article
    2025, IEEE SOLID-STATE CIRCUITS LETTERS, 8, p.221-224
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    Design and Analysis of a 4.2 mW 4 K 6-8 GHz CMOS LNA for Superconducting Qubit Readout

    Caglar, Alican  
    ;
    Van Winckel, Steven  
    ;
    Brebels, Steven  
    ;
    Wambacq, Piet  
    ;
    Craninckx, Jan  
    Journal article
    2023, IEEE JOURNAL OF SOLID-STATE CIRCUITS, (58) 6, p.1586-1596

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